Abstract
In this paper, we report on the structural and electronic properties of polycrystalline gallium antimonide (poly-GaSb) films (50–250 nm) deposited on p+ Si/SiO2 by metalorganic vapour phase epitaxy at 475 °C. GaSb films grown on semi-insulating GaAs substrates are included as comparative samples. In all cases, the unintentionally doped GaSb is p-type, with a hole concentration in the range of 2 × 1016 to 2 × 1017 cm−3. Exceptional hole mobilities are measured for polycrystalline GaSb on SiO2 in the range of 9–66 cm2/Vs, exceeding the reported values for many other semiconductors grown at low temperatures. A mobility of 9.1 cm2/Vs is recorded for an amorphous GaSb layer in a poly-GaAs/amorphous GaSb heterostructure. Mechanisms limiting the mobility in the GaSb thin films are investigated. It is found that for the GaSb grown directly on GaAs, the mobility is phonon-limited, while the GaSb deposited directly on SiO2 has a Coulomb scattering limited mobility, and the poly-GaAs/amorphous GaSb heterostructure on SiO2 displays a mobility which is consistent with variable-range-hopping. GaSb films grown at low temperatures demonstrate a far greater potential for implementation in p-channel devices than for implementation in ICs.
Highlights
Since the invention of the transistor, advancements in its technology have almost exclusively been achieved through dimensional scaling
We investigate low-temperature (
Samples were prepared for cross-sectional transmission electron spectroscopy (XTEM) imaging using an FEI Helios NanoLab 600i dual-beam focused ion beam (FIB)
Summary
Since the invention of the transistor, advancements in its technology have almost exclusively been achieved through dimensional scaling. Traditional von Neumann architecture involves a separation between the computing and memory components of an integrated circuit (IC) [1]. Sequential, or monolithic, integration involves each layer being grown on the same substrate, one above the other This means that rather than relying on mechanical precision to align the layers, the superior accuracy of lithographic precision is employed [5]. This proposed structure is not without its obstacles—namely, the low thermal budget necessary for growth or processing on the upper transistor layers of the structure (normally
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