Abstract

To improve the value of β of a pnp-merged vertical bipolar transistor (VBT) in ‘pseudo-BiCMOS’ technology, a novel VBT design with an inversion layer-extended emitter is proposed. A high emitter injection efficiency of the forward-biased inversion layer is demonstrated in a pnp VBT fabricated in 1 µm compensated CMOS technology.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.