High Frequency InGaAs MOSFET with Nitride Sidewall Design for Low Power Application

Jiongjiong Mo,Faxin Yu,Hua Chen,Zhiyu Wang

doi:10.1155/2017/4078240

Abstract

InxGa1-xAsdevices have been widely researched for low power high frequency applications due to the outstanding electron mobility and small bandgap of the materials. Regrown source/drain technology is highly appreciated in InGaAs MOSFET, since it is able to reduce the thermal budget induced by ion implantation, as well as reduce the source/drain resistance. However, regrown source/drain technology has problems such as high parasitic capacitance and high electric field at gate edge towards the drain side, which will lead to large drain leakage current and compromise the frequency performance. To alleviate the drain leakage current problem for low power applications and to improve the high frequency performance, a novel Si3N4sidewall structure was introduced to the InGaAs MOSFET. Device simulation was carried out with different newly proposed sidewall designs. The results showed that both the drain leakage current and the source/drain parasitic capacitance were reduced by applying Si3N4sidewall together with InP extended layer in InGaAs MOSFET. The simulation results also suggested that the newly created “recessed” sidewall was able to bring about the most frequency favorable characteristic with no current sacrifice.

Highlights

InGaAs MOSFET technology has been widely investigated for low power applications [1–7]
While high electron mobility is appreciated, III-V MOSFETs suffer from large drain leakage current when high electric field is applied [12–16]
Standard regrown source/drain MOSFETs only have one high-k layer between the gate metal and the source/drain, which forms high parasitic capacitances Cgs and Cgd according to C = ε0ε/t, prohibiting the device from attaining high frequency performance

Summary

Introduction

InGaAs MOSFET technology has been widely investigated for low power applications [1–7]. High source/drain parasitic capacitance prohibits the InGaAs MOSFET from boosting the frequency performance due to the high-k dielectric layer between the gate contact and the regrown source/drain contact. While high electron mobility is appreciated, III-V MOSFETs suffer from large drain leakage current when high electric field is applied [12–16]. To address these problems, a novel Si3N4 sidewall was introduced between the gate contact and the regrown source/drain. It is able to reduce the parasitic capacitance and the drain leakage current under high electric field. The “spacer 1” is able to effectively reduce the drain leakage current, while the “recessed spacer 2” can significantly decrease the parasitic capacitance without compromising the on-state performance

Design Consideration and Motivation

Simulation and Analysis

Proposed Device Processing

Conclusion