High-frequency fatigue testing of ferroelectric memory capacitors

Abstract

Fatigue testing of typical process-development ferroelectric capacitors requires application of controlled high-frequency waveforms to a capacitor (in the nF range) whose impedance at frequencies of interest is only a few Ω. Only experimental setups which have been designed with this fact in mind will give meaningful results. We analyze a range of typical setups and give the maximum fatigue frequency for each. A simple, standard setup may only allow frequencies of 20 kHz (109 cycles in an overnight run). A well-optimized setup will work at frequencies in the MHz range, allowing reaching 1011 cycles in an overnight run.