High-frequency compact analytical noise model of gate-all-around MOSFETs

Abstract

Silicon-on-insulator (SOI) MOSFETs are excellent candidates for replacing the current conventional bulk technologies. The most promising SOI devices are based on multiple gate structures, among these the surrounding gate (SGT) MOSFET being one of the best candidates for the downscaling of complementary CMOS technology toward the sub-50 nanometer channel length range. In these devices, the transition frequency ft is greatly increased, making them suitable for high-frequency applications. This makes the RF and microwave modeling, as well as high-frequency noise studies of these devices, a matter of utmost importance. In this paper, we present compact expressions to model the drain and gate current noise spectrum densities and their correlation for SGT MOSFETs. Using this model, the SGT MOSFET noise performances are studied. The current and noise models, due to their explicit analytical expressions, can be easily introduced in circuit simulators.