Abstract
The DTMOS architecture is particularly suited to very low supply voltage applications (0.5-0.6 V) (Colinge, 1987; Matloubian, 1993; Assaderaghi et al., 1994; Pelloie et al., 1999). This paper presents the high frequency behavior of DTMOS devices processed with a partially depleted 0.25 /spl mu/m SOI technology (Wilson et al., 1997; Lagnado and de la Houssaye, 1997; Cable, 1997; Ferlet-Cavrois et al., 1998; Tanaka et al., 1997). The paper compares DTMOS to floating body and grounded body MOS transistors, and shows the advantage of SOI DTMOS for very low power portable telecommunication systems.
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