High-frequency capacitance–voltage measurement of plasma-enhanced chemical-vapor-deposition-grown SiO2/n-GaN metal-insulator-semiconductor structures

Abstract

This work reports on the high-frequency capacitance–voltage (C–V) measurements of metal-insulator-semiconductor structures fabricated by depositing SiO2 film on an n-type GaN epitaxial layer. The SiO2 film was grown by plasma-enhanced chemical vapor deposition at 310 °C, and the GaN layer was grown by low-pressure metalorganic chemical vapor deposition on a sapphire substrate. High-frequency C–V measurements have been carried out in darkness with different bias ranges and sweep rates. With a bias between ±20 V, the small flatband shift and the very small hysteresis indicate that the interface trap concentration in the sample is low, and the interface state density is 2.1×1011 eV−1 cm−2. However, a pronounced increase of hysteresis with an extended bias range was observed. When the bias is over ±50 V, the increase of the hysteresis is much larger, indicating the nonuniform distribution of different slow deep states in the structure. The extracted interface state density is in the range of 1012 eV−1 cm−2.