Abstract
High-efficiency micro core–shell solar cell (μ-CSSC) arrays are fabricated from Si wafer by using traditional lithography and phosphorus diffusion. The p–n junction depth is around 450 nm, indicating that it forms core–shell structure in micropillars by using phosphorus diffusion. The μ-CSSC arrays have high minority carrier lifetime of 23 μs and long diffusion length of ∼150 μm. The best power efficiency of the μ-CSSC reaches to 9.2%. It is a convenient method for fabricating Si μ-CSSC arrays in wafer scale for future applications.
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