Abstract
A chip and wire, high density packaging approach has resulted in a low cost, large scale, high density, multi-chip package (MCP). The package includes 76 ICs, 1 resistor, and 34 capacitor chips on a 2 in × 3 in multilayer ceramic substrate (MLS) with 92 I/O leads. The package has a solder-sealed, metal cover over the chip-mount area, and a heat sink on the back side of the MLS.The primary yield was found to be around 70%. The rest was reworked with no significant labour. The software as well as hardware to minimize the test/rework labour would be a key to success in chip and wire MCPs. Also, efforts were made to reduce the material cost and the assembly labour. The thick film MLS was replaced by the ceramic MLS. The wire bonding was automated. Overall efforts reduced package cost to 1.25 times the conventional DIP-on-PCB counterpart (7.5 in × 9.1 in). Estimating its effectiveness at a system level, the reduction in the number of boards, connectors and cables would give MCPs an advantage over their counterparts. The improvement in reliability would be another advantageA comparison with other high density packaging technologies, chip carrier, and chip on tape, is also described.
Highlights
The increasing scale of electronic circuits, associated with system requirements for greater complexity and more multifunctions, is making it difficult to take the conventional, DIP-on-PCB approach for packaging devices into a limited physical volume
PACKAGING The overall package assembly, and the multilayer substrate (MLS) structure are shown in Figure 3 and Figure 4, respectively
The seal ring of the MLS and the seal area of a Kovar cover are presoldered with Sn63/Pb37 solder
Summary
The increasing scale of electronic circuits, associated with system requirements for greater complexity and more multifunctions, is making it difficult to take the conventional, DIP-on-PCB approach for packaging devices into a limited physical volume. To solve this problem, the LSI technology and the high density packaging technology are used individually, or in combination. Chip and wire technique makes it possible to achieve highest density and lowest cost packages. The authors intended to develop a low cost, large scale, high density, multi-chip package (MCP), aiming at cost comparable to that for DIP-on-PCB
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