High-density interconnect board design for wafer-level packaging

Abstract

The main advantage of wafer-level packaging is a smaller, thinner and lighter package with minimised electrical length and lower inductance. Presented is a printed circuit board electrical design to assemble a wafer-level package of a wireless radio core. The link impact and challenges are addressed in both time domain and frequency domain. The high-density interconnect substrate is analysed using a design of experiment technique to test the significance of structured variation. Its signal integrity and power delivery performance are compared with a similar design, but much thicker using a flip-chip package mounted on top of the conventional board. The thin board for wafer-level packaging provides better power delivery and signal performance than the traditional assembly.