Heuristic and metaheuristic procedures for the buffer sizing problem in parallel assembly lines balancing problem with multi-line workstations and different cycle times

Abstract

In the parallel assembly lines balancing problem (PALBP) there is the possibility that the operators can perform the tasks assigned to their multi-line workstation on two adjacent lines. As a result, the line efficiency can be increased. In a PALB system, the assembly lines can work with the same or different cycle times. In the latter case, the lines may produce in batches, and thus the use of buffers (existence and sizing) in multi-line workstations is needed. Exact procedures have been proposed to solve the buffer sizing problem (BSP) in a multi-line workstation, but only small-size instances can be solved in a viable computational time. The BSP is an unresolved problem for real-size instances. This paper presents the first non-exact procedures to solve real-size instances of the BSP in a multi-line workstation for a given set of tasks. The problem is detailed and described in the paper, and several heuristics and metaheuristic procedures are developed to solve it. Finally, several computational experiments are carried out to evaluate the procedures presented.