Heterojunction bipolar transistor featuring a stressed implanted collector: Defects formation and impact on functionality

Abstract

Optimization of Heterojunction Bipolar Transistors is crucial for improving RF capabilities of modern BiCMOS technologies. Fully-implanted collectors are meant to reduce fabrication complexity and Super Shallow Trench Isolation (SSTI) structures are used to reduce the consequent high base–collector capacitance. Ion implantation can induce lattice defects in silicon and carbon plus phosphorus co-implantation helps reducing them, even if it cannot avoid formation of dislocations generated by bad recrystallization of the implantation-induced amorphous silicon layer. Defects within the device are known to impact functionality and must be avoided. Understanding of the interaction between implantation-induced amorphization and substrate stress due to isolation structures is required for ensuring a reliable integration. Amorphous layer positioning with respect to substrate surface is investigated as the main defect-generation mechanism. Incomplete surface amorphization is shown to induce multiple types of dislocations affecting device functionality. Total surface amorphization ensures almost ideal current characteristics. Silicon clusters appear at high phosphorus/carbon ratios with no impact on functionality. Stress induced by isolation structures is not responsible for dislocations generation but modulates speed of the recrystallization fronts, impacting defects placement.