Heterogeneous integration of OE arrays with Si electronics and micro-optics

Abstract

This paper describes recent developments of the smart pixel array (SPA) technology for massively parallel optical interconnect applications. Built on Honeywell's commercially successful 850 nm vertical cavity surface emitting lasers (VCSELs) technology, the SPA technology employs 2-dimensional (2D) VCSEL array. It aims to push optical interconnect density and capacity to a new level, which brings a total optical IO capacity in the order of 100s, to 1000s of gigabit per second (Gbps) to the chip-level. This technology has following unique features that makes it not only technically feasible but also practical for low cost manufacturing. First, it employs optoelectronic (OE) array based on the new generation of oxide-confined VCSELs that have desired characteristics such as very high speed, high efficiency, and good array uniformity. Second, the OE array has monolithically integrated VCSEL's and photodetectors (PD's) which provides true chip scale bi-directional optical I/O solutions. Third, it uses hybrid integration techniques such as solder bump bonding and wafer scale integration, the 2D arrays of VCSEL/PD can be seamlessly integrated with beam shaping micro-optics array, and the state-of-the-art Si-based VLSI electronic ICs. Last, and perhaps most importantly, all of the technology implementations follow the guideline of being compatible with mainstream low cost manufacturing practices.