Heterogeneous CPU plus GPU approaches for HEVC

Abstract

The high efficiency video coding (HEVC) standard has opened the door to high-quality multimedia contents and new formats such as ultra-high definition as a result of the unceasing demands of the market. This standard is able to outperform prior standards by up to 50% in terms of perceptual video quality, but at the cost of extremely large computational complexities. For this reason, the development of fast coding algorithms is now a requirement to make HEVC an adequate candidate for real-world scenarios. In this regard, this paper proposes a collaborative CPU $$+$$ GPU coding architecture for this standard, in which the CPU performs a coarse-grained parallelization of the encoder, while the GPU carries out a fast motion estimation. Given that the GPU algorithm can work together with a wide variety of parallel algorithms, this paper evaluates two of them: tiles, defined in the standard, and slices, already present in previous standards. Results indicate that slices are more adequate in terms of parallel efficiency (10.75 $$\times {}$$ speedup on average using 12 threads), while tiles achieve better coding efficiency.