Abstract
Abstract: The advent of new nanometer process technologies has made it possible to integrate billions of transistors on a single chip. The increase in functionality coupled with decrease in size has resulted in more power consumption and this increases the need for a better and efficient power dissipation. This is resulting in significant amount of leakage currents flowing into the substrate made up of Silicon. This is resulting in increase in substrate heating and the thermal noise thus generated is coupling with the other signals. In this paper optimization of the Sherwood parameter has been carried and its effect on controlling the substrate heating is studied.
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