Heat transfer in a vertically integrated semiconductor device with unequal layer widths

Abstract

Vertically integrated semiconductor devices and interposer-based heterogeneous integration technologies are being commonly investigated for advanced microelectronic chips. Such multilayer structures often integrate layers of unequal lateral sizes. While most of the past literature on thermal modeling of multilayer semiconductor chips considers layers of uniform widths, heat transfer in multilayer systems with unequal widths orthogonal to the thickness direction has not been investigated much. This remains an important challenge towards effective thermal management of vertically integrated ICs and other semiconductor chips. This work presents an analytical model to determine the temperature distribution in a multilayer device with unequal layer widths. A series solution for temperature distribution in each layer is derived, with an independent set of eigenvalues for each layer. The coefficients of the series solutions are determined through the derivation of a set of linear algebraic equations in the coefficients. Results are found to be in good agreement with numerical simulations, and also agree well with past work for special cases. An analysis of the impact of unequal widths on heat transfer and temperature distribution is presented. It is shown that the lower the ratio of the layer widths, the greater is the peak temperature. On the other hand, layer thickness is found to have an interesting, non-monotonous impact on peak temperature, which is explained on the basis of the two-dimensional nature of heat transfer in this problem. It is found that for a representative SiGe-Si device, peak temperature increases by around 9% as the SiGe layer width is reduced to one-third compared to a baseline equal width case. The novelty of the present work is that it presents the thermal modeling of an important multilayer semiconductor architecture, which has not been addressed much in the past. Results presented here may help improve the thermal design of vertically integrated semiconductor devices and other similar multilayer devices.