Abstract
A new technique for second harmonic distortion (HD2) reduction is presented. The proposed technique can be very useful for front-end receiver applications where single-ended high-gain, low-distortion amplifiers are required. The theoretical analysis and simulations of this scheme in which the second derivative of the current can be cancelled by using an extra transistor biased in the triode region in parallel to a MOSFET in saturation is presented. This technique is also robust to process variations as a result of the use of a tuning voltage in the proposed design. A 9 dB reduction in the magnitude of HD2 has been achieved with this technique compared with an amplifier of similar power consumption. This technique can be used in a design without significant impact on area, power or noise performance.
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