Harmonics Reduction for Resolver-to-Digital Conversion via Second-Order Generalized Integrator With Frequency-Locked Loop

Abstract

Phase-locked loop (PLL) based resolver-to-digital conversion (RDC) can provide high-precision information of angular position and velocity for servo control system with resolver. However, there exist considerable harmonic components and random noises in the sinusoidal pair signals from resolver, which may impede further enhancement on the precision of RDC. In this paper, a signal filtering method is presented for RDC by combining two second-order generalized integrators (SOGIs) with a frequency-locked loop (FLL). In this method, FLL is designed in the form of second order to obtain high-accuracy estimate of resolver signal frequency, and two SOGIs are employed as frequency-adaptive band-pass filters to filter resolver pair signals by using the estimated frequency as the center frequency. Hence, the proposed method can track the fundamental components of resolver pair signals accurately, and thus harmonic components and noises can be reduced. Compared with the conventional SOGI-FLL, this method has better frequency adaptation and higher tracking accuracy since the accuracy of frequency estimation is improved by using second-order FLL. It resolves the problem of PLL in suppressing harmonics and low-frequency noises, thereby improving the accuracy of RDC. Simulation and experimental results demonstrate the effectiveness of the proposed method.