Harmonic minimisation in microprocessor controlled current fed PWM inverter drives

Abstract

New microprocessor-based pulse-width modulation (PWM) control techniques are presented for the current fed inverter (CFI) drive, which minimise the harmonic torque and speed-ripple effects normally associated with low-speed quasi-square-wave operations of CFI drives. It is shown how high-pulse number PWM harmonic elimination current strategies can be developed and used to eliminate substantially greater numbers of harmonics, which hitherto had not been thought a practical possibility. In addition, new PWM harmonic minimisation strategies are presented for the CFI drive, based on the minimisation of a weighted function of stator current harmonic amplitudes. These PWM current minimisation strategies are shown to give superior performance in terms of smoother rotor motion, reduced speed ripple and positional error and can therefore be used to extend the viable range of operation and application of the CFI drive. The complete theoretical development of the new harmonic minimisation PWM current strategies is presented and confirmed using both computed results and experimental results obtained from a previously developed microprocessor-controlled PWM CFI drive. Finally, the PWM control techniques are extended to the ‘duplex’ CFI drive and predicted to give considerable improvements in low-speed performance.