Abstract
Side channel analysis (SCA) is a powerful physical cryptanalysis. In common industrial practice, the SCA security evaluation is performed after the devices are manufactured. However, the post-manufactured analysis is time consuming, error prone and expensive. Motivated by the spirit of hardware/software co-design, a design-time SCA analysis is proposed to improve the efficiency. Firstly, a general SCA leakage model is presented, and then the flow of design-time security analysis is described. After that, a flexible simulation and analytical environment is built to assess the different SCA leakage. Finally, an illustrative experiment, which performs a design-time SCA analysis on the crypto-chip with AES-128 core, is given.
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