Hardware Transactional Memory Based on Abort Prediction and Adaptive Retry Policy for Multi-Core In-Memory Databases

Abstract

Since Intel has recently shifted Transactional Synchronization Extension (TSX) as its first mainstream Hardware Transactional Memory (HTM), HTM has greatly changed the parallel programming paradigm for transaction processing, As a result, a number of studies on HTM have been conducted actively. However, the existing studies consider only the prediction of a conflict between two transactions and provide a static HTM configuration for all workloads. To solve the problems, we propose an efficient hardware transactional memory scheme based on both abort prediction and adaptive retry policy for multi-core in-memory databases. First, the proposed scheme can predict not only conflicts between transactions running concurrently, but also the capacity and other aborts of transactions by collecting the information of previously executed transactions. Second, the proposed scheme can provide a near-optimal HTM configuration according to the characteristic of a given workload by using an adaptive retry policy based on machine learning algorithms. Finally, through our experimental performance analysis using STAMP, the proposed scheme shows about 30~40% better performance than the existing HTM-based schemes.