Hardware obfuscation for IP protection

Abstract

The horizontal business model adopted by the semiconductor industry has resulted in a manufacturing process that has integrated various foreign entities focusing on individual production steps. However, serious trust issues have emerged with the internationalization of the semiconductor supply chain, and the trust concerns grow further with the proliferation of theft, reverse engineering (RE), and piracy of hardware intellectual property (IP). Unlike the software industry, the semiconductor supply chain cannot benefit from traditional cryptographic solutions due to the requirement of white-box accessibility to the hardware IP. Therefore, hardware obfuscation has originated as a potential countermeasure against dreaded supply chain attacks. The obfuscation process aims to hide the design intent and lock functionality by introducing structural and functional transformations to the IP, which increases the resistance against unauthorized use and potential exploitation of the design by an adversary. In this chapter, we investigate hardware obfuscation techniques that have been developed in the past decade and the limitations and challenges of these techniques. In particular, we explore the evolution of different techniques that are applicable at various supply chain stages of the semiconductor life cycle, the development of obfuscation benchmarks, and the research trends in the area of obfuscation. We also expand on the innovative attacks that have been developed to compromise the obfuscation techniques, as well as the countermeasures that are introduced to combat them. This chapter also sheds light on the lessons learned from the decade-long research on obfuscation by discussing the attack trends and unsolved challenges. Finally, we conclude by presenting a road map that aims to improve the existing solutions and provides improved security metrics for systematic evaluation.