Hardware implementations of LBlock and XXTEA lightweight block ciphers for resource-constrained IoT application

Abstract

Recent growth in the number of connected Internet of Things (IoT) devices in a network has raised lot of security related issues. Since these devices are mostly battery powered, have low memory and weak computational capability, therefore lightweight ciphers are the most suitable choice for providing security. Among various lightweight ciphers available, we have chosen to implement corrected block TEA (XXTEA) and LBlock ciphers. These lightweight ciphers are feistel based, having simple encryption algorithms. In this work, two different architectures are proposed namely round-based implementation of LBlock cipher and serial implementation of XXTEA cipher with variable length message. Both the architectures are implemented on different field programmable gate array (FPGA) device families and application-specific integrated circuit (ASIC) implementation is performed on 0.18 μm complementary metal-oxide semiconductor (CMOS) technology. By analysing the performance metrics, comparison of the proposed work is done with the existing ciphers. For the proposed LBlock and XXTEA variable length architectures, the percentage improvement obtained with respect to area consumption is 50.92% and 26.04% respectively.