Hardware implementation of a pulse mode neural network-based edge detection system

Abstract

In this paper, we exploit the powerful means of neural networks with respect to function approximation. Once they are implemented on-chip, they can be reconfigured for adjusting their input–output relation in order to achieve clustering for decision making but also various image processing tasks such as filtering, edge detection, etc. As an illustration example, we propose here a neural network-based edge detection system. Edge detection reduces significantly the amount of data and filters out information that may be regarded as less irrelevant. It is becoming an important step in segmentation for many image processing applications. The proposed network achieves Canny operator edge detection based on pulse mode operations. Indeed, pulse mode neural networks are becoming an attractive solution in neural network implementation because of the advantages they provide over the continuous mode such as compactness of the pulse multiplier and flexibility of most of the blocs. Such simplicity offers the possibility of on-chip learning. In this work, the proposed edge detection network uses new extended range synapse multipliers operating in a fixed point format with a very simple architecture and adjustable activation functions. To provide the best edge detection, the back-propagation algorithm is modified to have pulse mode operations. Simulation results show the efficient learning and good generalization results. The corresponding design was implemented on a virtex II PRO FPGA platform. Synthesis results prove that the implemented neural network is more compact in terms of size than conventional implementations of a Canny edge detector.