Abstract
A frame work for analysing the capabilities and area of improvements for working of an embedded processor is constructed, and also a methodology for comparative study of simulation of processor on load and hardware results are explained in this paper. The processor can be modelled as a standalone processor or as a group of processors working together to take parallel program execution mode. The proposed frame work and simulation method uses the processor representation of current embedded processor model which is relevant in product design and devices modelling. This system utilizes the ARM processor model which consists of programs used for computing and standardizing the operational quality of a processor for any particular domain of applications. This paper presents steps for creating experimental framework which uses a simulation system running on a Linux based operating system along with kernel for running test applications on the target which is run in simulation mode. To evaluate the simulation with respect to the real hardware, this paper has made an observation of cache related performance of a typical embedded processor. The processor which is taken for the study is ARM926EJ-S processor. The future architectural components will be designed and simulated in the framework as continuation of this experiment. Their ARM9 technology equivalent design parameters for configurable modules of CPU in 1.8 micro-meter and experimental nano-meter level implementation would be calculated with architecture component design tools.
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More From: Journal of Computational and Theoretical Nanoscience
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