Abstract
In applications as in wireless communication, computer graphics and digital signal processing, a massive of complex matrix operations is often performed. Reciprocal is computed in large quantities in these matrix operations. To obtain high performance, efficient algorithm and hardware architecture are important in terms of low cost, low computation time and high precision. Second order first sub-function and squaring shrunk method have been proposed to build efficient hardware architecture for reciprocal using field programmable gate array. Second order first sub-function in harmonized parabolic synthesis is presented to improve the approximating precision and decrease the memory usage at the cost of additional multipliers. To further reduce the complexity, squaring shrunk method is proposed to decrease the expensive cost of multipliers. The combination of these techniques yields good performance trade-off. Precision simulation and hardware implementation result has shown that hardware reciprocal of high precision, low memory and low multiplier usage has been obtained compared to traditional first order first sub-function harmonized parabolic synthesis method.DOI: http://dx.doi.org/10.5755/j01.eie.24.2.20635
Highlights
Arithmetic element functions are playing very important roles in wireless communication, computer graphics and digital signal processing, reciprocal is one of these functions which are frequently computed in matrix operations [1]
Because of the characteristic of high throughput and low latency, hardware implementation has become a main approach in computing acceleration
Look up table [2], [3], Newton-Rapshon (NR) method [4], [5], Coordinate Rotation Digital Computer (CORDIC) [6], series expansion [7], and et al are of these algorithms developed to compute reciprocal
Summary
Arithmetic element functions are playing very important roles in wireless communication, computer graphics and digital signal processing, reciprocal is one of these functions which are frequently computed in matrix operations [1]. In order to design efficient hardware architecture for reciprocal, parabolic synthesis method has been presented [8] It uses the product of series of sub-functions to approximate the original reciprocal function, and it indicates performance improvement over CORDIC and Newton-Raphson method [9]. The proposed harmonized parabolic synthesis with second order first sub-function and non-linear interpolation in second sub-function combined with squaring shrunk method has obtained performance improvement for hardware architecture of reciprocal in terms of precision and complexity (memory bits and multipliers). It shows a competitive solution for reciprocal in application of field.
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