Abstract
This paper presents a novel tree-search based modified K-best algorithm and its hardware structure for spatially multiplexed wireless multiple-input multiple-output systems. The aim is to modify the existing K-best detection algorithm and to address the challenge involved in sorting of the path metrics to improve the suitability for hardware implementation while maintaining the BER performance. The proposed modified K-best algorithm results in reduction of 24% in path metric computations and the VLSI implementation of the modified K-best detector has been done for different antenna configurations and different constellations. Novel hardware architecture was proposed and the hardware complexity analysis was done. The proposed tree-search based modified K-best detector implemented on Xilinx Virtex 5 FPGA, targeting 4 × 4 antenna configuration with 16 QAM, achieves a constant throughput of 1 Gbps.
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