Abstract
Collision detection and avoidance is challenging when the mobile robot is moving among multiple dynamic obstacles. A hardware-efficient architecture supporting parallel implementation is presented in this work for low-power, faster and reliable collision-free motion planning. An approach based on interval analysis is developed for designing an efficient hardware architecture. The proposed architecture achieves parallelism which can be combined with any robotic task involving multiple obstacles. Interval arithmetic is used for representing the pose of the robot and the obstacle as velocity intervals in a fixed time period. These intervals correspond to sub-intervals such as arcs and line-segments. In particular, the collision detection problem for dynamic objects involves the computation of line segment-arc intersections and segment-segment intersections. The intersection of these boundary curves is carried out in a hardware-efficient manner so that it avoids complex arithmetic computations such as multiplication, division etc and exploits parallelism. We develop several results on intersection of these sub-intervals for collision detection and use them to obtain a hardware-efficient collision detection algorithm that requires only shift and add-type of computations. The algorithm is further used in developing a hardware-efficient technique for finding an exhaustive set of solutions for avoiding collision of the robot with dynamic obstacles. Simulation results in MatLab and experiments with a Field Programmable Gate Array (FPGA)-based robot show that a variety of collision avoidance techniques can be implemented using the proposed solution set that guarantees collision avoidance with multiple obstacles.
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