Hardware Constructions for Lightweight Cryptographic Block Cipher QARMA With Error Detection Mechanisms

Abstract

The cryptographic algorithm QARMA is a family of lightweight tweakable block ciphers targeted at applications such as memory encryption and construction of keyed hash functions. Utilizing lightweight security in hardware has the advantage of adopting the mechanisms to battery-constrained usage models including implantable and wearable medical devices. This lightweight block cipher utilizes a substitution permutation network (SPN) which is inspired by block ciphers such as PRINCE, MANTIS, and MIDORI. Moreover, it uses a three-round Even-Mansour scheme instead of the FX-construction, with its central permutation being non-involutory and keyed. In this article, we introduce error detection schemes on variations of QARMA, namely QARMA-64 and QARMA-128, which to the best of authors’ knowledge, have not been presented to date. We present our derivations for the logic-gate-based implementation, following which, we present the derivations for signature-based and interleaved signature-based schemes for the LUT-based approach. The presented, new signature-based error detection schemes, including cyclic redundancy check (CRC), are provided for the compact, involutory, and optimized S-box. Besides, recomputations through encoding the operands allow for the architectures to counter both transient and permanent faults. Also, the schemes are benchmarked on a field-programmable gate array (FPGA) hardware platform, where performance and implementation metrics show acceptable overheads and degradations. The proposed schemes are aimed to make the implementations of this lightweight tweakable block cipher more reliable.