Hardware-aware liquid state machine generation for 2D/3D Network-on-Chip platforms

Abstract

The liquid state machine (LSM) is a spiking neural network (SNN) that usually is offline mapped to an NoC-based neuromorphic processor to perform a specific task. The creation of these LSM models does not consider the structure of Network on Chip (NoC) which results in heavy communication pressure on the NoC. This paper proposes a hardware-aware generation framework for the LSM network by considering the spatial distribution of neurons in the NoC. It is the first time for the LSM generation work with combining the characteristics of NoC. This framework also adopts the heuristic algorithm to search the hyperparameter for the LSM networks to achieve state-of-art accuracy. It also reduces the spikes generated by those LSM models. It keeps the communication between neurons within cores as much as possible, which could reduce the communication between cores effectively and improve the performance of NoC, including reducing the traffic flow, reducing the average latency, improving the throughput and reducing the total running time.