Hardware Accelerators for Fast Implementation of DMC and GPC Control Algorithms Using FPGA and Their Applications to a Servomotor

Abstract

This work presents hardware accelerators implemented in the Field Programmable Gate Array (FPGA) which perform fast calculations for Model Predictive Control (MPC) algorithms. Two MPC algorithms are considered: Dynamic Matrix Control (DMC) and Generalized Predictive Control (GPC). The hardware accelerator-based DMC and GPC algorithms are applied to a servomotor.