Hardware-Accelerated Simulation Environment for CT Sigma–Delta Modulators Using an FPGA

Abstract

In this brief, a hardware-accelerated simulation environment for continuous-time (CT) $\Sigma\Delta$ modulators is presented. Due to the presence of the nonlinear quantizer, simulating $\Sigma\Delta$ modulators is a complicated task in general. The simulation of CT modulators is even more time consuming than that of their discrete-time counterparts, due to the analog loop filter. In particular, in an automated design environment, a large number of simulations have to be performed during the design process of $ \Sigma\Delta$ modulators. In this brief, it is shown for the first time that the system-level emulation of CT $\Sigma\Delta$ modulators on an field-programmable gate array results in a significant acceleration, reducing the simulation time by a factor of more than $\hbox{10}^{5}$ compared to a commonly used Simulink simulation. This allows simulating 10 000 of modulators per second, enabling the use of heuristic search algorithms for real-time design for CT $\Sigma\Delta$ modulators.