Abstract
Design of traveling wave amplifier (TWA) in 0.13/spl mu/m standard CMOS technology is presented. Modelling of 80 /spl Omega/ coplanar wave guide used to synthesize inductors TWA's lines is presented. Asymmetric cascode, CPW and losses compensation technique allow to maximize the TWA amplifier bandwidth. Simulations with design kit and developed models for CPW show a 52 GHz bandwidth with a maximum power gain of 10 dB for a 84 mW power consumption. Size of the layouted chip is 2.6 /spl times/ 0.6mm/sup 2/.
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