Abstract
Design of traveling wave amplifier (TWA) in 0.13/spl mu/m standard CMOS technology is presented. Modelling of 80 /spl Omega/ coplanar wave guide used to synthesize inductors TWA's lines is presented. Asymmetric cascode, CPW and losses compensation technique allow to maximize the TWA amplifier bandwidth. Simulations with design kit and developed models for CPW show a 52 GHz bandwidth with a maximum power gain of 10 dB for a 84 mW power consumption. Size of the layouted chip is 2.6 /spl times/ 0.6mm/sup 2/.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
