Guest Editorial: Special Issue on SoC for Multimedia Networking (SiPS 2007)

Abstract

This special issue focuses on “SoC for Multimedia Networking,” the theme of the 2007 IEEE Workshop on Signal Processing Systems (SiPS 2007) held in Shanghai, China in October 2007. This issue consists of highest quality papers selected from SiPS 2007 presentations with three major emphases centered on multimedia, networking, and architecture/SoC. For SiPS 2007, we were very pleased to receive a record number of 299 paper submissions from 36 countries. After a rigorous review and selection process, the final technical program consisted of 130 papers (43.48% acceptance rate) representing 25 different countries. These papers were arranged into nine lecture and 10 poster sessions (one special session), and the threeday technical program also included a student paper contest. The highlights of the workshop were the three keynote presentations by Magdy Bayoumi, Liang-Gee Chen, and Lajos Hanzo, each of them addressing state-ofthe-art and future direction in these emerging areas. To select high quality papers for publication in this special issue, authors of the papers that received high review scores were invited to submit expanded version of their papers to include more in-depth research work. Each of the papers was again carefully reviewed by at least three reviewers and the final decision for each was reached after careful discussion among the four guest editors. Finally, only seven papers passed through this rigorous process and were eventually accepted. They address some contemporary design and implementation issues in “SoC for Multimedia Networking” applications. In multimedia communication, it is always challenging to achieve high received video quality under coding and communication constraints. Guo et al. presents a fast multihypothesis motion compensated filter for video denoising. The authors utilize a number of hypotheses (temporal predictions) to estimate the current pixel which is corrupted with noise. Song et al. proposes an adaptive pixel interpolation technique for spatial error concealment in block-based coding system, where a missing pixel in a corrupted block can be derived from four neighborhoods of the block through interpolation using a multiple prediction strategy. The design works effectively in consecutive block loss situation which is common in real-time video. Pantoja et al. addresses the use of super-resolution algorithm based on irregular sampling for video transcoding with resolution conversion. This is because in transcoding, quantization and other techniques could result in lower video output quality. The proposed method was applied to VC-1 to H.264 transcoding to show video quality improvement. The paper also includes a hardware feasibility study. In system-on-chip designs, recent research have migrated from fairly simple single processor and memory designs to relatively complicated systems with multiple processors, onchip memories, standard peripherals, and other functional blocks. Communication between these blocks becomes the dominant critical system path and performance bottleneck of system-on-chip designs. Network-on-chip architectures emerged as solutions for future system-on-chip communication architecture designs. Wang et al. presents a novel network-onchip architecture, pipelining multi-channel central caching, to address the cost and communication latency/throughput of existing architectures. By embedding a central cache into every switch of the network, blocked head packets can be removed from the input buffers and stored in the caches temporally, thus alleviating the effect of head-of-line and X. Yang :W. Zhang Shanghai Jiao Tong University, Shanghai, China