Guest Editorial: 20 Years of ASAP

Abstract

This double issue is dedicated to celebrating the twentieth anniversary of the ASAP Conference. The ASAP Conference series started in 1986 in Oxford, UK as the International Workshop on Systolic Arrays, which became the International Conference on Systolic Arrays in San Diego, USA (1988) and in Killarney, Ireland (1989). It became the International Conference on Application Specific Array Processors in Princeton, USA (1990), Barcelona, Spain (1991), Berkeley, USA (1992), Venice, Italy (1993), San Francisco, USA (1994), and Strassbourg, France (1995). To reflect its expanding scope, the conference took on its current title as the International Conference on Application-specific Systems, Architectures and Processors, while keeping the ASAP acronym, in Chicago, USA (1996). Since then the conference has been held in Zurich, Switzerland (1997), Boston, USA (2000), San Jose, USA (2002), the Hague, the Netherlands (2003), Galveston, USA (2004), Samos, Greece (2005), Steamboat Springs, USA (2006), Montreal, Canada (2007), and Leuven, Belgium (2008). Over the last 20 years, the ASAP conferences have served as a platform on which theoreticians and practitioners from academia, government and industry interact to share experience and to find the way forward for application-specific processors, architectures and systems, and their deployment in various application domains. The gathering was international from the first event in 1986: contributors and participants came from Asia, Europe, and North America. This issue contains 14 contributions covering a wide variety of aspects of application-specific computing, based on material first discussed at ASAP’06, the seventeenth conference in the ASAP series. In particular, a number of authors for this special issue also contributed to the first ASAP event in 1986; they are thus in an excellent position to report on progress achieved since then. We have also invited authors to review recent developments, such as configurable computing, instruction set extensions, and multi-processor system-on-chip. The 14 contributions can be classified into four themes: systolic design, application-specific techniques, instructionset processing, and architecture review and trends. The three papers in the first theme begin with systolic design, an effective style of application-specific processing from which the title of the first ASAP event in 1986 was derived. The first paper, by Swartzlander, provides a personal perspective of systolic FFT processors. The second paper, by Yao and Lorenzelli, concerns highperformance systolic algorithms and architectures. The third paper, by Woods, McCanny and McWhirter, reviews the evolution of bit-level architectures from systolic arrays to multi-core chips. The four papers in the second theme cover various aspects of application-specific techniques. The first paper, by Balasa et al., introduces storage estimation and design space exploration methodologies for memory management of signal processing applications. The second paper, by Karkooti, Radosavljevic and Cavallaro, describes configurable decoder architectures for regular and irregular Low Density Parity Check (LDPC) codes. The third paper, by Lee, Chan, and Verbauwhede, presents a design methodology for throughput-optimised architectures for hash J Sign Process Syst (2008) 53:1–2 DOI 10.1007/s11265-008-0260-0