Greedy Edge-Wise Training of Resistive Switch Arrays

Abstract

A technical challenge of machine learning based on artificial neural network is large-scale multiply-accumulate (MAC) operation that is costly. The larger the network, the more MAC operations are required for inference as well as training. As an alternative to this conventional digital MAC operation, a resistive switching memory array realizes analog MAC operations in a fully parallel manner. Algorithms for training such an array are mainly taken from conventional machine learning algorithms such as backpropagation. They are also customized such that they are suitably implemented on the array. In this chapter, we address such customized machine learning algorithm as well as new algorithms that are barely based on the conventional machine learning. A particular focus will be placed on a recently proposed greedy edge-wise training algorithm that is suitable for resistive switching memory arrays.