Gray counters for non-volatile memories

Abstract

New technologies for non-volatile memories combine the speed and byte addressability of current memory technologies with the low cost, density, and non-volatility of current storage technologies. They use energy only when writing or reading data. While some newer technologies have practically unlimited endurance, others, such as Phase Change Memory do not. However, this limited endurance surpasses that of solid state drives by several orders of magnitude. They can be integrated into the current memory storage hierarchy as a replacement for DRAM. To manage limited endurance, age-based wear leveling divides the memory into pages and counts the number of writes to a page. Pages with high counts can then be relegated to store more stable data. Counters experience “write concentration” as they are incremented as frequently as a page is written, but the changes are concentrated in a much smaller area around the least significant bit. Current designs store page write counters with the page table in the main memory unit.We propose and investigate an alternative counter design based on Gray codes that distributes the bit-flips resulting from the increments over the vast majority of the bits making up the counter. This is a bit-flip aware data structure that can be used in other contexts as well. We show that this design allows us to integrate the page counters into the phase change memory device. We also investigate counters using error control codes.