Abstract

The development of RRAM is one of the mainstreams for next generation non-volatile memories to replace the conventional charge-based flash memory. More importantly, the simpler structure of RRAM makes it feasible to be integrated into a passive crossbar array for high-density memory applications. By stacking up the crossbar arrays, the ultra-high density of 3D horizontal RRAM (3D-HRAM) can be realized. However, 3D-HRAM requires critical lithography and other process for every stacked layer, and this fabrication cost overhead increases linearly with the number of stacks. Here, it is demonstrated that the 2D material-based vertical RRAM structure composed of graphene plane electrode/multilayer h-BN insulating dielectric stacked layers, AlOx/TiOx resistive switching layer and ITO pillar electrode exhibits reliable device performance including forming-free, low power consumption (Pset = ~2 μW and Preset = ~0.2 μW), and large memory window (>300). The scanning transmission electron microscopy indicates that the thickness of multilayer h-BN is around 2 nm. Due to the ultrathin-insulating dielectric and naturally high thermal conductivity characteristics of h-BN, the vertical structure combining the graphene plane electrode with multilayer h-BN insulating dielectric can pave the way toward a new area of ultra high-density memory integration in the future.

Highlights

  • With the increasing demand for improved computing performance of mobile electronic products, the need for storage electronic device like flash memory as one of the vital components has climbed up

  • Another layer of poly(methyl methacrylate) (PMMA) is coated on the chemical vapor deposition (CVD) multilayer hexagonal boron nitride (h-BN)/Cu foil

  • The AlOx/TiOx resistive switching layer and indium tin oxide (ITO) pillar electrode are realized via atomic layer deposition (ALD) and sputtering processes, respectively, as shown in Fig. 1(d and e)

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Summary

Introduction

With the increasing demand for improved computing performance of mobile electronic products, the need for storage electronic device like flash memory as one of the vital components has climbed up . The current flash technology has found a way to overcome the scaling limit by adopting three dimensional (3D) architecture to achieve high density, the endurance and large power consumption are still fundamental issues that need to be surmounted[4, 5]. The simple fabrication process, good scaling capability and low bit cost[27,28,29] are some of the potential merits presented in some recent studies to demonstrate that several 3D vertical RRAM are competitive with the high bit density of 3D NAND flash memory. A few studies mainly focus on the stacking potential of the device in a 3D architecture by introducing the carbon-based electrodes, including carbon nanotube (CNT) and graphene to attain the ultra-high storage density and realize the low power consumption properties[34, 35]. The ability of heat spreading in insulating dielectrics between these different layers of electrodes is still not good enough

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