Graph-Based Circuit Simulator for Switched Capacitor Circuits

Abstract

Switched capacitor circuits exhibit dynamic topology and operate on clock phase dependent charge transfer. A circuit simulator that can directly compute branch charges by retaining capacitors and closed switch branches while excluding open switch branches based on clock is proposed in this work. Topological/graph-based formulation is used for charge level analyses of ideal switched capacitor circuits. The simulator supports time, frequency, noise and sensitivity analyses of switched capacitor circuits for any number of clock phases. The compact linear difference equation can compute time responses in a straightforward manner while frequency analysis is based on the impulse response of the circuit. Adjoint network concept is used to perform noise and sensitivity analyses for computing noise spectrum and differential derivatives respectively. The same formulation holds good for the adjoint equivalent network also since the network topology and incidence matrix almost remains same. Simulation results are presented for sample circuits to demonstrate the performance of the proposed simulator. Time and frequency responses have been compared with SWITCAP while noise and sensitivity responses with a commercial simulator.