GPU-oriented dynamic low-power data transmission method

Abstract

The model highly parallel graphics processor systems rely on high-bandwidth DRAM I/O interfaces for large volume of data access at the cost of a lot of energy consumption. In order to reduce the energy consumption of data transmission, modern DRAM uses an asymmetric pseudo-drain I/O interface, which increases the ratio of the termination energy to the transmission energy of logic value 1 in data transactions. This paper proposes the X + B Dynamic Bus Encoding Mechanism, which dynamically selects the encoding mechanism to reduce the number of logical values 1 within different data elements, thereby reducing the data transmission energy consumption of the modern DRAM data bus. The simulation evaluation shows the X + B Dynamic Bus Encoding Mechanism reduces the number of logical values 1 by 38.6%, which saves 31.4% of transmission energy consumption compared to the current bus coding technology.