Abstract

In the recent past, High-Performance-Computing machines and in particular Computational-Fluid-Dynamics hardware, have been dominated by architectures that mainly included clusters of processors communicating on high-speed interconnects.Since a few years though, cluster performance has reached an upper limit for many technical codes. The scalar-processor ability has saturated, and the sustained Flops often result to be only a fraction of the declared peak values. In an attempt to overcome these difficulties, the electronic industry has unveiled new trends. Since about 2004, there has been a transition taking place in high-performance scientific computing, with the advent of multicore- and manycore chips, so that the different software models for parallel programming needed to be revisited. In the present work these issues are addressed with reference to the field of fluid-flow investigation through the numerical integration of the Navier–Stokes equations. A mixed spectral-finite difference computational code for the numerical solution of the three-dimensional time-dependent incompressible Navier–Stokes equations (with no forcing), is implemented on a high-performance hybrid CPU/GPGPU computing system. The computational algorithm is thought for the execution of accurate calculations at high values of the flow Reynolds number, so allowing the investigation of turbulence with the method of the Direct Numerical Simulation (no turbulence models in the system of the governing equations). The performance of different code implementations has been measured as related to the case of the flow of a viscous incompressible fluid in a plane channel, a problem that has a long tradition in the field of wall-bounded turbulence research, so becoming a reference case for the study of turbulence via Direct Numerical Simulation. Results are presented in terms of parallel performance of the computational code on different hardware partitions of the computing system, as related to corresponding different sizes of the computational grid, showing that remarkably-high computational performance is reached, mainly in virtue of the presence of the GPGPU boards in the computing-hardware architecture.

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