Global routing for VLSI standard cells

Abstract

Global routing is an important and time consuming step in the VLSI physical design cycle. In order to solve this problem effectively, we present two standard cell global routing approaches: a heuristic approach and an integer linear program (ILP) based approach. The objective of the heuristic approach is to find the minimum cost path for each net by enumerating a set of possible two-bend routes. It is also parallelized by using the Message Passing Interface (MPI) library to speed up the running time and achieve better performance. The ILP based approach formulates the global routing problem as an ILP problem and then relaxes it as a linear programming (LP) problem to reduce the computation complexity. All the algorithms are evaluated on Sun-blade 2000; the experimental results show high performance from both global routers. Good speedups and solution qualities are obtained from the parallel implementation. The average speedup achieved is five times on six processors, and the total density is reduced by an average of 2.45% as well.