Gettering efficiencies of polysilicon-, stacking fault- and He-implanted backsides for Cu and Ni

Abstract

We have studied the gettering efficiencies of copper and nickel in silicon wafers with polysilicon-, stacking fault- and He-implanted backsides. The gettering test begins with a controlled spin-on spiking in the range of low 10 12 atoms cm −2, followed by a metal drive-in at 800°C 30 min −1 under argon atmosphere. The depth profile of the metals was analyzed using inductively coupled plasma-mass spectrometry in combination with a novel chemical, layer-by-layer etching procedure. We were able to reveal the depth profile with a depth resolution of 0.5 μm in each etching step. The gettering efficiency was similar for all backside preparations and always larger for copper than for nickel. We concluded that the backside gettering sites reduced the activation energy of the formation of metal silicides at a given temperature when the solubility limit has been reached. The dependence of the gettering efficiency for the different metal species can be explained by comparing the diffusion coefficients at the temperature of saturation. The higher the diffusion rate at the temperature of saturation, the more efficient the backside gettering. In a second experiment, we examined polysilicon backside gettering of different cooling rates. The gettering efficiency was strongly dependent upon the cooling rate and related to the diffusion rate of the metals. When the cooling rate is high enough, the metals migrate too slowly to reach the wafer backside and precipitate as silicides or metal colonies on defect sites. In these cases, gettering occurred during controlled cooling of the wafers after the metal drive-in.