Abstract

A Ge-redistributed poly-Si/SiGe stack gate (GRPSG) has been proposed to improve the current performance of PMOS without the degradation of NMOS for sub-0.1 /spl mu/m CMOSFETs with ultrathin gate oxide. Ge diffusion into the poly-Si layer was promoted more by ion implantation of N-type dopants such as P and As rather than P-type dopants. NMOS and PMOS had different Ge concentrations at the interface between gate electrode and gate oxide by an additional anneal to redistribute the Ge profile. The current performance of NMOS with GRPSG with low Ge content ( 20%) was improved due to suppression of the poly-depletion effect and boron penetration. In addition, the gate reoxidation was modified to reduce G/sub m/ degradation by reduced gate bird's beak. High-performance 70 nm-CMOSFETs were successfully fabricated using the simple GRPSG process.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.