Generation of Hot-Carrier Induced Border and Interface Traps, Investigated by Spectroscopic Charge Pumping

Abstract

Hot-carrier degradation in silicon devices is typically assumed to create interface states, so-called P b centers, which are located at the Si-SiO 2 interface. However, published energy distributions of these interface states do not always agree with the known energetic distribution of P b centers. We closely investigate these energy profiles caused by hot-carrier stress using spectroscopic charge pumping and compare those to previously published results. It is shown how apparently different profiles can be explained by the additional appearance of border traps. Constant high charge pumping (CP) is used as a tool to additionally characterize those defects. It is found that the CP pulse voltages can have a larger impact on the measured border trap density than the CP frequency, which is usually used to separate border from interface traps.