Generalized Burnout Model for Circuit Simulation

Abstract

Accurate analysis of susceptibility of circuits from damage due to electrostatic discharges (ESDs), electromagnetic pulses, and lightning effects is required to ensure reliable operation of electronic devices and systems. A generalized theory of calculating semiconductor device thermal failure was developed for the use in circuit simulation. Thermal convolution integrals were developed from simple physical assumptions and used to predict device damage. This basic model was normalized to a generic failure function, and then, generalized to better match empirical test data of semiconductor device failure. This representation was transformed into the Laplace domain and further generalized to incorporate the steady-state thermal response of the device and provide numerical stability. The thermal convolution integral representation was used to derive a simple expression for Wunsch–Bell burnout parameters from ESD ratings of devices. A model was developed using the Laplace domain representation of the device failure theory. This circuit model allows for burnout predictions using commercial circuit simulation software and follows the theoretical equation with 2% error. The developed equations and circuit models allow for a simple susceptibility analysis of circuits using commercial software and readily available ESD ratings of semiconductor devices.