Abstract
We propose a general expression for plasma extraction transit-time oscillations (PETT-Oscs) from silicon-bipolar power semiconductor devices. PETT-Oscs are generated when the transition time for the hole to fly into the depletion region and be accelerated by the electric field harmonizes with the resonant frequency of the loops through stray inductances and p-n junction capacitances. A physical model of PETT leads to an expression that takes into account its dependence on voltage and dopant density. The average carrier speed in the depletion region and the junction temperature dependence are fitted to the experimental results. The validity of the proposed general expression for PETT-Osc is verified successfully through state-of-the-art insulated-gate bipolar transistor module design. PETT-Osc from the package is estimated to generate at the typical operating conditions. The expression guiding the prevention method for PETT-Osc and the completed module does not show PETT-Osc in the operational range. The expression indicates the existence of PETT-Osc outside of the operational range, although it does not appear in the voltage and current for the collector or the gate. However, precise measurement using an antenna revealed the presence of PETT-Osc at the predicted conditions.
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