Ge Nano-Heteroepitaxy: From Nano-Pillars to Thick Coalesced Layers

Abstract

Ge co-integration with Si has always attracted a lot of attention. Thanks to its superior electronic properties, Ge can be used as a channel material in p-type Metal Oxide Semiconductor transistors (high hole mobility) or low power devices such as tunnelling field effect transistors (steep sub-threshold swing operation). Furthermore, Ge is a key enabler in numerous optoelectronic devices (light emitters and photo-detectors). The epitaxial growth of Ge on Si is far from being lattice matched, with a 4.2% difference between Si and Ge, making high quality growth difficult, especially for thick layers.Several schemes have been explored in the literature to obtain thick, good crystalline quality Ge layers, such as a low temperature/high temperature approach followed by a cyclic anneal which yielded flat, slightly tensile strained thick Ge layers with threading dislocation densities around 107 cm-2. Other methods based on epitaxial lateral overgrowth, aspect ratio trapping and 3D heteroepitaxy of Ge films on patterned Si substrates have shown promising results thanks to defect blocking against sidewalls or their containment in certain directions. However, some planar defects were still present at the coalescence fronts with those growth methods.Another interesting method is to perform a heteroepitaxy of Ge in nanometer-size Si windows surrounded by SiO2. Lee et al [1] succeeded in obtaining high quality Ge layers using nano-heteroepitaxy but did not go further in the analysis of defects generated with such an approach. In a previous work [2], we were able to obtain smooth, fully strain relaxed Si0.76Ge0.24 layers with heteroepitaxial growth in nanometer-size Si windows surrounded by SiO2. In that case, SiGe epitaxial growth was carried out on a patterned substrate with a regular array of nanometre-size seed pillars, and growth fronts from individual nano-pillars coalesced to form complete 2D layers. However, planar defects such as stacking faults and twins were present in the final layers. In this work, we wanted to test this growth approach for pure Ge and provide an in-depth analysis of any defects generated.An original process flow based on diblock copolymer patterning was thus used to fabricate nanometer-size SiO2 based templates for growth (Figure 1a). The nano-heteroepitaxy of 2D Ge layers on these templates was performed at 90 Torr, using GeH4 as a precursor, and compared to growth on blanket Si.Ge nano-pillar growth was first investigated, with a delayed Ge growth found at 400°C. Nano-pillars obtained after the growth of 35 nm of Ge were not as homogeneous and well-defined as the 20 nm high SiGe nano-pillars in Ref. [3]. Raising the growth temperature to 600°C resulted in a highly selective and uniform process, with homogeneous and well-defined Ge nano-pillars for growth nominally 20 nm thick. The expected nano-pillar coalescence scheme was also observed at this growth temperature [3]. Transmission Electron Microscopy (TEM) imaging of the 20 nm sample grown at 600°C showed facetted Ge nano-pillars, with numerous 90° edge dislocations at the Ge/Si interface as expected given the low critical thickness of Ge on silicon (4 nm, typically) and the 20 nm nano-pillar width (Figure 1b).Ge thick layers were then grown with a low temperature/high temperature strategy on bulk and nano-patterned substrates for a benchmark of the nano-heteroepitaxy approach. Atomic Force Microscopy (AFM) showed micrometric-size holes at the surface for Ge layers grown on nano-patterned substrates. This might be due to an incomplete coalescence of the thick Ge layers, which were by contrast very smooth on bulk Si (Figure 1c). TEM analysis of a 600 nm thick Ge layer grown on Ge nano-pillars suggested that coalescence resulted in planar defects such as twins and stacking faults starting at the oxide walls, as found for SiGe pillars in previous studies, in addition to edge dislocations at the Ge/Si interface. Despite these morphological differences, similar structural properties (in terms of degree of strain relaxation and Full Width at Half Maximum of the Ge spot along the in-plane direction) were inferred from X-Ray Diffraction (XRD) for layers grown on nano-patterned and bulk substrates (Figure 1d).[1] J. Lee et al., J. Cryst. Growth 301–302, 330 (2007).[2] M. Mastari et al., Nanotechnology 29, 275702 (2018).[3] M. Mastari et al., ECS J. Solid State Sci. Technol. 8, 180 (2019). Figure 1