Abstract
Gate-to-source leakage current in symmetric double-gate MOSFET is analytically computed considering the effect of transverse surface electric field and surface charges at both the source and drain regions. Tunneling current through trapezoidal potential barrier is considered, and current charge factors are taken into account at both the contacts. Channel length modulation, mobility degradation and threshold roll-off are considered for modelling, and current is computed for various structural parameters and applied bias ranges under practical doping conditions. Optimum lower level of leakage current is identified for specific range of gate bias, and corresponding parameters are also evaluated for best possible performance of the device. Results are useful for applicability in circuit design with lower sub-threshold devices.
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