Abstract
In this paper, we present the architecture and the experimental characterization of an improved version of a previously developed 32 × 32 Single Photon Avalanche Diodes (SPADs) and Time to Digital Converters (TDCs) array, and two new arrays (with 8 × 8 and 128 × 1 pixels) with the additional capability of actively gating the detectors with sub-nanosecond rise time. The arrays include high performance SPADs (0.04 cps/μm2, 50% peak PDE) and provide down to 410 ps Full-Width at Half-Maximum (FWHM) single shot precision and excellent linearity. We developed a camera to exploit these imagers in time-resolved, single-photon applications.
Highlights
Single Photon Avalanche Diodes (SPADs) are single photons detectors that, after being used for several decades in research applications, are recently gaining interest in industrial, automotive and consumer electronics
The rest of the paper is structured as follows: Section 2 describes the architecture of the three arrays, Section 3 shows the experimental characterization in terms of Single photon avalanche diode (SPAD) and to Digital Converters (TDCs) performance, while Section 4 summarizes the results and provides conclusions
Recently many SPAD arrays for photon timing have been developed by several research groups [14]–[18], with different trade-offs and recommended applications, we believe that the array we present provides remarkable flexibility with its per-pixel TDCs with extended range and high duty cycle, coupled with extremely low-noise SPADs
Summary
Single Photon Avalanche Diodes (SPADs) are single photons detectors that, after being used for several decades in research applications, are recently gaining interest in industrial, automotive and consumer electronics. The main strengths of SPAD arrays with respect to Charge Coupled Devices (CCDs) and CMOS Active Pixel Sensors (APSs) are the absence of readout noise (which allows down to one photon counting within each integration time), the possibility to precisely time stamp the photon arrival time, and to rapidly gate on and off the detector. We will focus on the architecture and on the experimental characterization of the improved version of a 32 × 32 SPADs and Time to Digital Converters (TDCs) array already presented in [1] and of brand new arrays with 8 × 8 and 128 × 1 pixels. The new designs, in addition to the photon timestamping capabilities of the former, allow to actively gate the detector with sub-nanosecond rise time. The rest of the paper is structured as follows: Section 2 describes the architecture of the three arrays, Section 3 shows the experimental characterization in terms of SPAD and TDC performance, while Section 4 summarizes the results and provides conclusions
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